In most electronic development projects, the core technology only represents a small part of the actual development effort. The remaining part is merely the necessary carrier to realize the core technology. Prevas' ESIP concept is a systematic breakdown of the carrier technologies into subsystems, which can be integrated into a custom design supporting your core technology.
Designing a system with ESIP's is initiated by choosing a suitable core design that matches the processing power and cost requirements of your system. The core design encapsulates the processor, RAM, solid state storage, and power management. The core design supports a number of peripherals through on-board interfaces, which can be populated according to your system's requirements. The actual peripherals are either custom designed or chosen from the Prevas ESIP peripheral library.
If an operating system is required, a number of options are supported for each ESIP; Linux, Android Windows Embedded and a number of smaller RTOS.
The majority of the ESIPs are implemented in existing designs currently in the market and verified in respect to EMC, High speed performance and stability. This means significantly reduced design risk and cut in both development time and cost.