Electronic Subsystems IP (ESIP) is a modulized way of developing custom electronic designs, reducing the need to reinvent well proven designs. Prevas maintains a large number of ESIP designs, where the majority is already “proven”, matured, and implemented in products in the market. This significantly reduces the unknown factor that is always present in the development of new designs.
Whether you choose to integrate it in-house or in corporation with Prevas' specialists, the Prevas ESIP concept significantly shortens time to market. It reduces development cost and risk, without having to suffer a higher production cost of a prefabricated module.
The Core ESIP's are the engine of your design and typically includes design and layout of processor, power management IC, RAM, and flash memories. When designing your system from ESIPs, your first task is to choose a suitable core ESIP that matches the processing and interface requirements of your system.
The contents of an ESIP core package typically consists of:
- Simulation report
- Bill of Materials (ex PCB)
- Full documentation package
- Bootloader (incl. mux setup, timing parameters and registers)
iMX6 Core Design, low power high performance design with all modern multimedia and communication interfaces in one package.
iMX53 Core Design, proven high speed core design for multimedia applications based on Freescales i.MX53 processor, with integrated configurable DDR3 memory, Flash, and power management.
iMX28 Core Design, production hardened high speed core design for industrial applications based on Freescales i.MX28 processor with integrated configurable DDR2 memory, Flash and power management.